Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
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Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
An efficient ternary serial adder based on carbon nanotube FETs - ScienceDirect
DG-CNTFET simulation. (a) Simulation setup. (b) Simulated n-branch
Design and evaluation of energy-efficient carbon nanotube FET-based quaternary minimum and maximum circuits - ScienceDirect
Efficient CNTFET-based design of quaternary logic gates and arithmetic circuits - ScienceDirect
Full article: A novel, efficient CNTFET Galois design as a basic ternary-valued logic field
5. CNTFET-based design of ternary.pdf
Electronics, Free Full-Text
Full article: Design of CNTFET-based 2-bit ternary ALU for nanoelectronics
Design and analysis of carbon nanotube FET based quaternary full adders
A universal method for designing low‐power carbon nanotube FET‐based multiple‐valued logic circuits - Moaiyeri - 2013 - IET Computers & Digital Techniques - Wiley Online Library
Stanford CNTFET Model in [32].
Design and evaluation of energy-efficient carbon nanotube FET-based quaternary minimum and maximum circuits
PDF] Design and Evaluation of Multiple Valued Logic Gates Using Pseudo N-Type Carbon Nanotube FETs
PDF) Efficient CNTFET-based design of quaternary logic gates and arithmetic circuits
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